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Senior RTL Design Engineer
Senior RTL Design Engineer
SambaNovaAbout the role
SambaNova Systems is seeking a Senior RTL Design Engineer to join their team building the compute datapath, on-chip network, and memory subsystems for their RDU AI accelerator. In this role, you will own blocks within a larger subsystem, contributing to microarchitecture specifications, writing and debugging RTL, and guiding blocks through implementation, tape-out, and silicon bring-up. The ideal candidate will have 5+ years of ASIC RTL design experience, strong SystemVerilog skills, and a solid foundation in computer architecture. This is an opportunity to work on cutting-edge AI acceleration systems and contribute to the full ASIC development cycle.
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