Jobs

Efficient is seeking an experienced Lead Digital Verification Engineer to drive the functional verification of complex SoC/IP designs from specification through tapeout. This role involves owning the verification strategy, defining methodology standards, building and guiding a team, and serving as the final authority on verification quality. The ideal candidate will have 10+ years of ASIC/SoC design verification experience, with deep expertise in UVM-based testbench architecture and SystemVerilog. This is a unique opportunity to influence product development and processes as the company moves towards market release and scaled volume production.