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ASIC Validation Engineer
ASIC Validation Engineer
EriduAbout the role
Eridu is seeking highly experienced Post-Silicon ASIC Validation Engineers (Sr. to Principal level) with deep expertise in networking ASICs and chiplet-based architectures. In this role, you will lead the bring-up, validation, and characterization of complex multi-die systems, focusing on high-speed interconnects like UCIe, SerDes, and PCIe. You will be responsible for validation planning, test execution, and debugging across various subsystems, utilizing Python for automation. This is an opportunity to work on next-generation networking SoCs and disaggregated chiplet platforms, ensuring first-silicon success and robust product readiness for AI data centers.
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