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High-Speed IO Architect - PCIe/UCIe/Ethernet Subsystems
High-Speed IO Architect - PCIe/UCIe/Ethernet Subsystems
TYLsemiAbout the role
TylSemi is seeking a High-Speed IO Architect to own the high-speed interface architecture for their chiplet infrastructure IP, crucial for scaling AI/HPC systems. This role involves defining and guiding the architecture for PCIe/Ethernet and UCIe die-to-die integration, working with SerDes, analog, and digital teams. The ideal candidate will have 15+ years of experience in high-speed interface architecture, deep expertise in PCIe and UCIe, and a proven track record of driving complex IP integrations through tape-out. This is a critical opportunity to build foundational silicon infrastructure for the exploding AI market.
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