Jobs

We are seeking an experienced Packaging Engineer to lead bump interconnect development for advanced semiconductor devices, including 2.5D/3D/chiplet/fan-out technologies. This role involves end-to-end ownership of ubump and C4 processes, metallurgy, RDL development, and design rules. The successful candidate will collaborate with OSATs, perform failure analysis, and ensure robust package performance from concept to high-volume production. Strong experience in bump interconnect processes, metallurgy, and RDL plating, along with problem-solving skills in manufacturing environments, are essential for this hybrid remote position.