Jobs

TYLsemi is seeking a Mixed-Signal Design RTL Design Engineer to develop critical chiplet infrastructure IP for the exploding AI/HPC market. This role involves architecting, modeling, and implementing digital control loops for high-frequency IVRs, translating models into production-quality RTL, and performing mixed-signal verification. The ideal candidate will have a strong mixed-signal background, expert-level MATLAB/Simulink experience, and 8+ years in power management ICs or high-performance mixed-signal design. Join a fast-paced, high-impact team building the foundational silicon infrastructure for AI.