Jobs

Upscale AI is seeking a Principal Engineer for their ASIC Design team to build high-performance infrastructure for next-generation AI. This role involves defining micro-architecture, performing logic design/RTL entry, and collaborating with various engineering teams to meet power, performance, and area targets. Candidates should have 5+ years of industry experience in complex ASIC logic design with SystemVerilog and a strong understanding of fundamental logic design principles. The ideal candidate will thrive in a fast-paced startup environment and contribute to foundational problems with real-world impact.