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Design Verification Engineer
Design Verification Engineer
SambaNovaSambaNova Systems is seeking a talented and motivated Design Verification Engineer, DFT to contribute to the development of state-of-the-art RDU chips for machine learning and artificial intelligence. This role involves developing and executing comprehensive verification plans for complex chip-level control and initialization features, utilizing SystemVerilog/UVM based environments. The ideal candidate will have 5+ years of industry experience, strong proficiency in SystemVerilog and UVM, and a solid understanding of digital design and SoC architecture. You will work closely with architects, RTL designers, and firmware engineers to drive verification closure and debug simulation failures.
