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Senior ASIC Design Engineer
Senior ASIC Design Engineer
Positron AIPositron AI is seeking a Senior ASIC Design Engineer to lead the definition, implementation, and delivery of critical IP blocks and subsystems for their AI inference ASICs/SoCs. This role involves owning the microarchitecture from concept to RTL signoff, collaborating cross-functionally, and driving architectural tradeoffs for silicon performance and efficiency. The ideal candidate will have 8+ years of complex ASIC/SoC RTL design experience, deep SystemVerilog expertise, and a proven track record of delivering high-performance silicon. You will also mentor junior engineers and contribute to methodology improvements, shaping the next generation of AI inference hardware.
