Jobs

Efficient is seeking an experienced Lead Digital Verification Engineer to drive the functional verification of complex SoC/IP designs. This role involves owning the verification strategy, defining methodology standards, building and guiding a team of verification engineers, and ensuring verification quality and sign-off readiness. The ideal candidate will have 10+ years of ASIC/SoC design verification experience, with deep expertise in UVM-based testbench architecture and SystemVerilog, to help shape the future of computing at the edge.