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SoC RTL Design Engineer
SoC RTL Design Engineer
TYLsemiAbout the role
TYLsemi is seeking an experienced SoC RTL Design Engineer to join their team in San Jose, CA or Bangalore, India. This role involves owning critical chip infrastructure components like reset sequencing, power management, clocking, and embedded management processor subsystems for AI/HPC chiplet solutions. The ideal candidate will have 8+ years of digital IC design experience, with a focus on infrastructure ownership, and strong SystemVerilog skills. This is an opportunity to contribute to the foundational technology powering the exploding AI infrastructure market.
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