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Principal RTL Design Engineer
Principal RTL Design Engineer
SambaNovaSambaNova is seeking a Principal RTL Design Engineer to lead the microarchitecture and RTL development for their next-generation Reconfigurable Dataflow Unit (RDU) AI accelerator. This senior individual contributor role involves owning a major block from specification through tape-out, focusing on power, performance, and area trade-offs to achieve aggressive frequency targets. The ideal candidate will have 7+ years of ASIC RTL design experience, mastery of SystemVerilog, and a deep understanding of high-frequency design techniques and computer architecture. This role offers the opportunity to drive technical direction, mentor engineers, and contribute to cutting-edge AI acceleration systems.
