Jobs

We are seeking a SerDes Implementation Lead to spearhead the physical-layer implementation, configuration, tuning, and post-silicon validation of ultra-high-speed data links, including 112G and 224G PAM4. This hands-on technical role involves taking SerDes IP macros from integration through bring-up, optimizing equalization parameters, and ensuring stable link operation across challenging physical channels. The ideal candidate will have proven experience with 56G, 112G, or 224G PAM4 links, deep understanding of SerDes implementation and debug, and proficiency with high-speed lab equipment and Python-based automation. You will collaborate closely with SI/PI, hardware, and firmware teams to define best practices for SerDes validation across the company's hardware platforms.