Jobs

K2 is seeking a Principal ASIC Design Verification Engineer to verify the functionality, performance, and robustness of custom silicon designs for their high-power satellites. This hands-on role involves defining verification approaches, building SystemVerilog/UVM test benches, and driving constrained-random testing strategies. The ideal candidate will have 10+ years of ASIC/SoC verification experience, strong proficiency in SystemVerilog, and a solid understanding of hardware design and verification flows. This is an opportunity to shape first-generation silicon and contribute to a groundbreaking Series C space startup.