Jobs

K2 is seeking a Senior ASIC Design Verification Engineer to verify the functionality, performance, and robustness of custom silicon designs for their high-power satellites. This hands-on role involves defining verification approaches, building UVM test benches, and driving constrained-random testing strategies. The ideal candidate will have 5+ years of experience in ASIC/SoC verification, strong SystemVerilog skills, and proficiency with simulation and coverage tools. You will collaborate closely with various engineering teams to shape first-generation silicon and contribute to advanced DV methodologies.