Jobs

TylSemi is seeking a Principal PCIe Subsystem RTL Lead to spearhead the development of next-generation chiplet-based SoCs for AI/HPC systems. This role involves owning the PCIe subsystem microarchitecture, leading the integration of third-party PCIe IP, and defining critical aspects like bifurcation, transaction layer pipelines, and power management. The ideal candidate will have 10+ years of digital IC design experience with deep expertise in PCIe architecture and strong SystemVerilog RTL skills. Join a fast-paced, high-impact team building the foundational silicon infrastructure for the exploding AI market.