Silicon Validation, Test & Characterization Engineer (title will reflect experience) Engineering Bay Area Bay Area Full-time Eliyan is building NuLink, a proprietary die-to-die chiplet interconnect fabric purpose-built for AI infrastructure at hyperscale. We're looking for a hands-on validation and characterization engineer working at the intersection of photonics, opto-electronics, and high-speed electrical interconnect. You'll bring up real devices, characterize optical modulators, lasers, photodiodes, and the analog circuits that drive and receive them, and feeding what you learn directly back to the designers shaping the next generation of parts. This is a strong fit for someone who enjoys instruments and test & measurements as much as they enjoy code, and who wants to build deep, practical expertise in high-speed optical and electrical tests. Eliyan is building NuLink, a proprietary die-to-die chiplet interconnect fabric purpose-built for AI infrastructure at hyperscale. We're looking for a hands-on validation and characterization engineer working at the intersection of photonics, opto-electronics, and high-speed electrical interconnect. You'll bring up real devices, characterize optical modulators, lasers, photodiodes, and the analog circuits that drive and receive them, and feeding what you learn directly back to the designers shaping the next generation of parts. This is a strong fit for someone who enjoys instruments and test & measurements as much as they enjoy code, and who wants to build deep, practical expertise in high-speed optical and electrical tests. Key Responsibilities:

Execute early silicon bring-up activities, including system initialization, validation infrastructure development, and test content creation for high-speed interfaces.
Define and drive comprehensive post-silicon validation plans for multi-Gbps SerDes, PHYs, and associated interconnect technologies (e.g., PCIe, CXL, Ethernet, DDR).
Develop robust automation frameworks and test scripts (e.g., Python, TCL) to improve validation efficiency and coverage.
Perform advanced electrical and protocol-level validation, including BER testing, jitter and eye diagram analysis, compliance testing, and margin assessments.
Correlate lab measurements with pre-silicon simulations and design expectations; drive debug and closure on discrepancies, identify and root-cause silicon, package, and board-level issues.
Work cross-functionally with design, architecture, system, and product engineering teams to optimize validation coverage and drive design-for-validation improvements.
Document validation results, issues, and recommendations in detailed technical reports and communicate findings clearly to engineering and executive leadership.
Support manufacturing and test engineering teams with validation methodologies to enable production ramp and customer readiness.

Qualifications:

3+ years of experience
Expertise in chip bring-up, post-silicon validation, and debug of high-speed interconnects
(e.g., PCIe, CXL, Ethernet, DDR, SerDes).
Hands-on experience with high-speed lab equipment (high-bandwidth oscilloscopes, BERT, DCA, VNAs, TDRs) and associated validation methodologies.
Fundamentals in signal integrity (SI), power integrity (PI), clock architectures, analog and mixed-signal, high speed DAC and ADC, equalization (CTLE, DFE), and link training protocols.
Ability to correlate silicon measurements to design simulations and models and drive systematic debug.
Strong scripting and automation skills (Python preferred).
Experience in PCB/evaluation board validation is a plus.
Excellent analytical, communication, and leadership skills.
MS or PhD in electrical engineering, computer engineering, physics or related fields

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